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gnucap:user:netlist_import_and_export:geda [2025/11/12 05:42] felixs Non-circuit items, text |
gnucap:user:netlist_import_and_export:geda [2025/12/04 04:26] (current) felixs [Parameter declarations] add example |
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| ==== Parameter declarations ==== | ==== Parameter declarations ==== | ||
| - | A parameter in a schematic may be declared using an instance of parameter-1.sym, which carries the ''symbol=schematic-parameter'' attribute. It corresponds to a parameter declaration in a Verilog module. | + | A parameter in a schematic may be declared using an instance of parameter-1.sym, which carries the ''symbol=schematic-parameter'' attribute. An instance of it, |
| + | C 46400 43900 1 0 0 parameter-1.sym | ||
| + | { | ||
| + | T 47600 44300 5 10 1 1 0 0 1 | ||
| + | refdes=bias | ||
| + | T 46500 44000 5 10 1 0 0 0 1 | ||
| + | default_value=17 | ||
| + | T 46400 44000 5 10 1 0 0 0 1 | ||
| + | verilog_type=real | ||
| + | } | ||
| + | |||
| + | corresponds to a parameter declaration in a Verilog module, optionally with metadata, as follows. | ||
| + | |||
| + | (* S0_x=46400, S0_y=43900, geda_symbol="parameter-1.sym" [more geda_metadata] *) parameter bias = 17.; | ||
| + | |||
| + | Additional gEDA attributes such as ''verilog_type'' may be used to carry unsupported data. This needs addressing in gEDA or Lepton and is beyond the scope of the translation. | ||
| + | |||
| + | (* S0_x=46400, S0_y=43900, geda_symbol="parameter-1.sym" [more geda_metadata] *) parameter real bias = 17.; | ||
| + | |||
| + | Multiple declarations in a single statement | ||
| + | |||
| + | parameter real a=0, b=1, c=2; | ||
| + | |||
| + | are not supported in gEDA, but may be unrolled into multiple components. | ||
| ==== The value attribute ==== | ==== The value attribute ==== | ||