This shows you the differences between two versions of the page.
gnucap:paramset_spice [2023/01/19 08:05] felixs fix model arg in approach 1 |
gnucap:paramset_spice [2023/01/19 11:17] (current) felixs approach 2c |
||
---|---|---|---|
Line 101: | Line 101: | ||
.bf=bf; .off=off; .area=area; | .bf=bf; .off=off; .area=area; | ||
endparamset | endparamset | ||
+ | </code> | ||
+ | |||
+ | == approach 2c (separator) == | ||
+ | |||
+ | Same as 2b, but use a separator that is not allowed in a Verilog identifier. | ||
+ | |||
+ | <code> | ||
+ | paramset b bjt/npn; | ||
+ | [..] | ||
</code> | </code> | ||
Line 108: | Line 117: | ||
<code> | <code> | ||
- | paramset a b c; // choose approach 2b | + | paramset a b c; // choose approach 2c |
paramset a b; // choose fallback or sckt bundle if b is in model_dispatcher | paramset a b; // choose fallback or sckt bundle if b is in model_dispatcher | ||
paramset a b; // normal mode, otherwise. | paramset a b; // normal mode, otherwise. | ||
</code> | </code> |