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gnucap:nlnet22 [2023/01/04 05:59] felixs spice paramset link |
gnucap:nlnet22 [2023/01/05 16:35] (current) felixs link to paramset usage from 2a |
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== a) Model overloading by name and parameter ranges according to standard. == | == a) Model overloading by name and parameter ranges according to standard. == | ||
Verilog defines "paramset" as a means to replace model cards known from spice, cf. LRM section 6.4. | Verilog defines "paramset" as a means to replace model cards known from spice, cf. LRM section 6.4. | ||
- | The standard essentially allows multiple prototypes by the same name with mutually different interfaces [[paramset_usage|TODO_USAGE]]. | + | The standard essentially allows multiple prototypes by the same name with mutually different interfaces [[gnucap:manual:languages:verilog#paramset|usage]]. |
This requires changes to the way device instances are read in and elaborated [[paramset_implementation|TODO_IMPL]]. | This requires changes to the way device instances are read in and elaborated [[paramset_implementation|TODO_IMPL]]. | ||
== b) Implement preprocessor, support backtick, macros, conditionals. == | == b) Implement preprocessor, support backtick, macros, conditionals. == |